Essay about Flip Flops and Latches

700 Words Feb 13th, 2014 3 Pages
Flip-Flops & Latches
Digital Electronics

Flip-Flops & Latches
This presentation will
• Review sequential logic and the flip-flop. • Introduce the D flip-flop and provide an excitation table and a sample timing analysis. • Introduce the J/K flip-flop and provide an excitation table and a sample timing analysis. • Review flip-flop clock parameters. • Introduce the transparent D-latch. • Discuss flip-flop asynchronous inputs.
2

Sequential Logic & The Flip-Flop

Inputs

. .

Combinational Logic Gates

. .

Outputs

Clock

Memory Elements (Flip-Flops)

3

D Flip-Flop: Excitation Table

D
D Q

CLK
 

Q
0 1

Q
1 0

0 1

CLK

Q
 : Rising Edge of Clock

4

D Flip-Flop: Example Timing
Q=D=1
…show more content…
Hold Time (tH): The time interval after the active transition of the clock signal during which the data input (D, J, or K) must be maintained.
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Asynchronous Inputs
Asynchronous inputs (Preset & Clear) are used to override the clock/data inputs and force the outputs to a predefined state. The Preset (PR) input forces the output to:
D PR Q

Q 1 & Q  0
The Clear (CLR) input forces the output to:

CLK

Q

CLR

Q  0 & Q 1
PR
PRESET

CLR
CLEAR

CLK
CLOCK

D
DATA

Q
0 1 1 0 1

Q
1 0 0 1 1 Asynchronous Preset Asynchronous Clear ILLEGAL CONDITION
12

1 1 0 1 0

1 1 1 0 0

  X X X

0 1 X X X

D Flip-Flop: PR & CLR Timing
Q=D=1
Clocked

Q=D=0
Clocked

Q=D=0
Clocked

Q=D=1
Clocked

Q=D=1
Clocked

Q=D=0
Clocked

Q
Q=1
Preset

Q=1
Preset

PR CLR D CLK

Q=0
Clear

13

Transparent D-Latch

EN
D Q

D
X 0

Q
Q0

Q
Q0

0 1

0

1

EN

Q

1

1

1

0

EN: Enable

14

Transparent D-Latch: Example Timing
“Latched” Q=0
“Transparent” Q=D “Latched” Q=1 “Transparent” Q=D

“Latched” Q=0

“Transparent” Q=D

Q D EN

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Flip-Flop Vs. Latch
• The primary difference between a D flip-flop and D latch is the EN/CLOCK input. • The flip-flop’s CLOCK input is edge sensitive, meaning the flip-flop’s output changes on the edge (rising or falling) of the CLOCK input. • The latch’s EN input is level sensitive, meaning

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